View ADM2486_422758.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

High Speed Half-Duplex iCoupler(R) Isolated RS-485 Transceiver ADM2486
FEATURES
Half-duplex isolated RS-485 transceiver PROFIBUS compliant Complies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482:1987(E) 20 Mbps data rate Low power operation: 12 mA (IDD1 + IDD2) @ 20 Mbps 5 V or 3 V operation (VDD1) High common-mode transient immunity: >25 kV/s Isolated DE status output Receiver open-circuit fail-safe design Thermal shutdown protection Safety and regulatory approvals: UL recognition--2500 VRMS for 1 minute per UL 1577 CSA component acceptance notice #5A VDE certificate of conformity DIN EN 60747-5-2 (VDE 0884 Part 2):2003-01 DIN EN 60950 (VDE 0805):2001-12; EN 60950:2000 VIORM = 560 V peak Operating temperature range: -40 to 85C Wide-body, 16-lead SOIC package
GENERAL DESCRIPTION
The ADM2486 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482:1987(E). The device employs Analog Devices' iCoupler technology to combine a 3-channel isolator, a 3-state differential line driver, and a differential input receiver into a single package. The logic side of the device can be powered with either a 5 V or a 3 V supply while the bus side is powered with an isolated 5 V supply. The ADM2486 driver has an active high enable. The driver differential outputs and the receiver differential inputs are connected internally to form a differential input/output port that imposes minimal loading on the bus when the driver is disabled or when VDD1 or VDD2 = 0 V. Also provided is an active high receiver disable that causes the receive output to enter a high impedance state. The device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention might cause excessive power dissipation. The part is fully specified over the industrial temperature range and is available in a 16-lead, wide-body SOIC package.
APPLICATIONS
Isolated RS-485/RS-422 interfaces PROFIBUS networks Industrial field networks Multipoint data transmission systems
FUNCTIONAL BLOCK DIAGRAM
REQUEST TO SEND, RTS
BUS ENABLE, DE
GALVANIC ISOLATION
LOGIC SIDE
TRANSMIT DATA, TxD
POWER_VALID
A B
04604-0-001
RECEIVE DATA, RxD RECEIVE ENABLE, RE
VDD1
GND1
VDD2
GND2
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
BUS SIDE
ADM2486 TABLE OF CONTENTS
Specifications..................................................................................... 3 Timing Specifications....................................................................... 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 ADM2486 Characteristics ............................................................... 7 Package Characteristics ............................................................... 7 Regulatory Information............................................................... 7 Insulation and Safety-Related Specifications............................ 7 VDE 0884 Insulation Characteristics ........................................ 8 Pin Configuration and Function Descriptions............................. 9 Test Circuits..................................................................................... 10 Switching Characteristics .............................................................. 11 Typical Performance Characteristics ........................................... 12 Circuit Description......................................................................... 13 Electrical Isolation...................................................................... 13 Truth Tables................................................................................. 13 Power-Up/Power-Down Thresholds ....................................... 13 Thermal Shutdown .................................................................... 14 Receiver Fail-Safe Inputs ........................................................... 14 Magnetic Field Immunity.......................................................... 14 Applications Information .............................................................. 15 Power Valid Input....................................................................... 15 Isolated Power-Supply Circuit .................................................. 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 16
REVISION HISTORY 7/04--Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADM2486 SPECIFICATIONS
2.7 VDD1 5.5 V, 4.75 V VDD2 5.25 V, TA = TMIN to TMAX, unless otherwise noted. Table 1.
Parameter DRIVER Differential Outputs Differential Output Voltage, VOD Min Typ Max Unit Test Conditions/Comments
2.1 2.1 2.1 |VOD| for Complementary Output States Common-Mode Output Voltage, VOC |VOC| for Complementary Output States Output Short-Circuit Current, VOUT = High Output Short-Circuit Current, VOUT = Low Bus Enable Output Output High Voltage
5 5 5 5 0.2 3 0.2 200 200
V V V V V V V mA mA V V V V V V V V A
R = , Figure 3 R = 50 (RS-422), Figure 3 R = 27 (RS-485), Figure 3 VTST = -7 V to 12 V, VDD1 4.75, Figure 4 R = 27 or 50 , Figure 3 R = 27 or 50 , Figure 3 R = 27 or 50 , Figure 3 -7 V VOUT +12 V -7 V VOUT + 12 V IODE = 20 A IODE = 1.6 mA IODE = 4 mA IODE = -20 A IODE = -1.6 mA IODE = -4 mA TxD, RTS, RE, PV TxD, RTS, RE, PV TxD, RTS, RE, PV = VDD1 or 0 V
60 60 VDD2-0.1 VDD2-0.3 VDD2-0.4
VDD2-0.1 VDD2-0.2 0.1 0.2 0.1 0.3 0.4
Output Low Voltage
Logic Inputs Input High Voltage Input Low Voltage CMOS Logic Input Current (TxD, RTS, RE, PV) RECEIVER Differential Inputs Differential Input Threshold Voltage, VTH Input Hysteresis Input Resistance (A, B) Input Current (A, B) RxD Logic Output: Output High Voltage Output Low Voltage
0.7 VDD1 -10 0.01 0.25 VDD1 10
-200 20 70 30
200
mV mV k mA mA V V V V mA A
0.6 -0.35 VDD1-0.1 VDD1-0.4
-7 V VCM +12V -7 V VCM +12V -7 V VCM +12V VIN = +12 V VIN = -7 V IOUT = 20 A, VA-VB=0.2 V IOUT = 4 mA, VA-VB=0.2 V IOUT = -20 A, VA-VB=-0.2 V IOUT = -4 mA, VA-VB=-0.2 V VOUT = GND or VCC 0.4 V VOUT 2.4 V
VDD1-0.2 0.2 0.1 0.4 85 1
Output Short Circuit Current Three-State Output Leakage Current
7
Rev. 0 | Page 3 of 16
ADM2486
Parameter POWER SUPPLY CURRENT Logic Side Min Typ Max 1.3 2.9 10.2 0.8 1.1 4.3 Bus Side 53.4 86.7 COMMON-MODE TRANSIENT IMMUNITY1 HIGH FREQUENCY COMMON-MODE NOISE IMMUNITY 25 100 3.0 Unit mA mA mA mA mA mA mA mA mA kV/s mV Test Conditions/Comments RTS = 0 V, VDD1 = 5.5 V 2 Mbps, VDD1 = 5.5 V, Figure 5 20 Mbps, VDD1 = 5.5 V, Figure 5 RTS = 0 V, VDD1 = 3 V 2 Mbps, VDD1 = 3 V, Figure 5 20 Mbps, VDD1 = 3 V, Figure 5 RTS = 0 V 2 Mbps, RTS = VDD1, Figure 5 20 Mbps, RTS = VDD1, Figure 5 VCM = 1 kV, Transient Magnitude = 800 V VHF = +5V, -2 V < VTEST2 < 7 V, 1 < fTEST < 50 MHz, Figure 6
1
CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
Rev. 0 | Page 4 of 16
ADM2486 TIMING SPECIFICATIONS
2.7 VDD1 5.5 V, 4.75 V VDD2 5.25 V, TA = TMIN to TMAX, unless otherwise noted. Table 2.
Parameter DRIVER Maximum Data Rate Propagation Delay tPLH, tPHL RTS-to-DE Propagation Delay Pulse-Width Distortion, tPWD Switching Skew, tSKEW Rise/Fall Time tR, tF Enable Time Disable Time Enable Skew, |tAZH-tBZL|, |tAZL-tBZH| Disable Skew, |tAHZ-tBLZ|, |tALZ-tBHZ| RECEIVER Propagation Delay tPLH, tPHL Differential Skew tSKEW Enable Time Disable Time POWER VALID INPUT Enable Time Disable Time Min 20 25 20 Typ Max Unit Mbps ns ns ns ns ns ns ns ns ns ns ns ns ns s s Test Conditions/Comments
45 35 2 5 43 43 1 2
55 55 5 5 15 53 55 3 5 55 5 13 13 2 5
RLDIFF = 54 , CL1 = CL2 = 100 pF, Figure 7 Figure 8 RLDIFF = 54 , CL1 = CL2 = 100 pF, Figures 7 and 12 RLDIFF = 54 , CL1 = CL2 = 100 pF, Figures 7 and 12 RLDIFF = 54 , CL1 = CL2 = 100 pF, Figures 7 and 12 Figures 9 and 14 Figures 9 and 14 Figures 9 and 14 Figures 9 and 14 CL = 15 pF, Figures 10 and 13 CL = 15 pF, Figures 10 and 13 RL = 1 k, CL = 15 pF, Figures 11 and 15 RL = 1 k, CL = 15 pF, Figures 11 and 15
25
45 3 3 1 3
Rev. 0 | Page 5 of 16
ADM2486 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. All voltages are relative to their respective ground. Table 3.
Parameter VDD1 VDD2 Digital Input Voltage (RTS, RE, TxD) Digital Output Voltage RxD DE Driver Output/Receiver Input Voltage Operating Temperature Range Storage Temperature Range Average Output Current per Pin JA Thermal Impedance Lead Temperature Soldering (10 sec) Vapour Phase (60 sec) Infrared (15 sec) Rating -0.5 V to +7 V -0.5 V to +6 V -0.5 V to VDD1 + 0.5 V -0.5 V to VDD1 + 0.5 V -0.5 V to VDD2 + 0.5 V -9 V to +14 V -40C to +85C -55C to +150C -35 mA to +35 mA 73C/W 260C 215C 220C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 6 of 16
ADM2486 ADM2486 CHARACTERISTICS
PACKAGE CHARACTERISTICS
Table 4.
Parameter Resistance (Input-Output)1 Capacitance (Input-Output)1 Input Capacitance2 Input IC Junction-to-Case Thermal Resistance Output IC Junction-to-Case Thermal Resistance Symbol RI-O CI-O CI JCI JCO Min Typ 101, 2 3 4 33 28 Max Unit pF pF C/W C/W Test Conditions f = 1 MHz Thermocouple located at center of package underside
1 2
Device considered a two-terminal device: pins 1, 2, 3, 4, 5, 6, 7, and 8 shorted together and pins 9, 10, 11, 12, 13, 14, 15, and 16 shorted together. Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADM2486 will be approved by the following organizations upon product release: Table 5.
Organization UL Approval Type To be recognized under 1577 component recognition program. File E214100 Notes In accordance with UL1577, each ADM2486 is proof tested by applying an insulation test voltage 3000 V rms for 1 second (current leakage detection limit = 5 A) In accordance with VDE 0884, each ADM2486 is proof tested by applying an insulation test voltage 1050 VPEAK for 1 second (partial discharge detection limit = 5 pC).
CSA VDE
Approved under CSA Component Acceptance Notice #5A. File 205078. Approved according to: DIN EN 60747-5-2 (VDE 0884 Rev. 2):2002-04 DIN EN 60950 (VDE 0805):2001-12;EN 60950:2000 File 2471900-4880-0001
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 6.
Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Minimum External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group Symbol L(I01) L(I02) Value 2500 8.4 min. 8.1 min. 0.017 min. >175 IIIa Unit VRMS mm mm mm V Conditions 1-minute duration. Measured from input terminals to output terminals, shortest distance through air. Measured from input terminals to output terminals, shortest distance path along body. Insulation distance through insulation. DIN IEC 112/VDE 0303 Part 1. Material Group (DIN VDE 0110, 1/89, Table 1).
CTI
Rev. 0 | Page 7 of 16
ADM2486
VDE 0884 INSULATION CHARACTERISTICS
This isolator is suitable for safe electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. An asterisk (*) on packages denotes VDE 0884 approval for 560 V peak working voltage. Table 7.
Description Installation classification per DIN VDE 0110, for rated mains voltage 150 V rms 300 V rms 400 V rms Climatic classification Pollution degree (DIN VDE 0110, Table 1) Maximum working insulation voltage Input to output test voltage, Method b1 VIORM x 1.875 = VPR, 100% production test, tm = 1 sec, partial discharge < 5 pC Input to output test voltage, Method a (After environmental tests Subgroup 1) VIORM x 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC (After input and/or safety test Subgroup 2/3) VIORM x 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC Highest allowable over-voltage (Transient over-voltage, tTR = 10 sec) Safety-limiting values (maximum value allowed in the event of a failure. See thermal derating curve, Figure 27) Case temperature Input current Output current Insulation resistance at Ts, VIO = 500 V Symbol Characteristic I to IV I to III I to II 40/85/21 2 400 1050 Unit
VIORM VPR
VPEAK VPEAK
896 VPR VTR 672 4000
VPEAK VPEAK VPEAK
TS IS, INPUT IS, OUTPUT Rs
>109
C mA mA
Rev. 0 | Page 8 of 16
ADM2486 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VDD1 1 GND1* 2 RxD 3
16 VDD2
ADM2486
15 GND2*
14 NC TOP VIEW (Not to Scale) 13 RE 4 B 12 A 11 NC 10 DE 5 9
RTS 5 TxD 6
4 PV 7
GND1* 8 NC = NO CONNECT
GND2*
Figure 2. Pin Configuration
Table 8.
Pin No. 1 2, 8 3 4 5 6 7 9, 15 10 11, 14 12 13 16 Mnemonic VDD1 GND1 RxD RE RTS TxD PV GND2 DE NC A B VDD2 Function Power Supply, Logic Side. Ground, Logic Side. Receiver Output data. This output is high when (A - B) > 200 mV, and low when (A - B) < -200 mV. The output is tri-stated when the receiver is disabled, i.e. when RE is driven high. Receiver Enable input. This is an active-low input. Driving this input low enables the receiver, while driving it high disables the receiver. Request to Send Input. Driving this input high enables the driver, while driving it low disables the driver. Transmit Data input. Data to be transmitted by the driver is applied to this input. Power Valid. Used during power-up and power-down. See the Applications Information section. Ground, Bus Side. Driver Enable Status Output. This output signals the driver enable or disable status to other devices on the bus. DE is high when the driver is enabled and low when the driver is disabled. No Connect. Noninverting Driver Output/Receiver Input. When the driver is disabled or VDD1 or VDD2 is powered down, pin A is put in a high impedance state to avoid overloading the bus. Inverting Driver Output/Receiver Input. When the driver is disabled or VDD1 or VDD2 is powered down, pin B is put in a high impedance state to avoid overloading the bus. Power Supply, Bus Side.
Rev. 0 | Page 9 of 16
04604-0-003
NOTE *PINS 2 AND 8 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND1. PINS 9 AND 15 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND2.
ADM2486 TEST CIRCUITS
R VOD
04604-0-005
A RLDIFF B
CL1 CL2
04604-0-007
R
VOC
Figure 3. Driver Voltage Measurement
Figure 7. Driver Propagation Delay
375
DE 150
VOD3
60
VTST
04604-0-006
RTS
GALVANIC ISOLATION
50pF
375
TxD
Figure 4. Driver Voltage Measurement
RxD RE DE VDD1 GND1
A B
GALVANIC ISOLATION
150
VDD2
GND2
TxD
VDD2 A B 195
Figure 8. RTS to DE Propagation Delay
VCC A 110 S1 B
04604-0-004
RxD RECEIVE ENABLE VDD1 GND1
110 195 GND2
TxD
S2 50pF VOUT
04604-0-009
VDD2
GND2
RTS
Figure 9. Driver Enable/Disable
Figure 5. Supply- Current Measurement Test Circuit
A VOUT
04604-0-012
B
RTS DE
RE
CL
GALVANIC ISOLATION
Figure 10. Receiver Propagation Delay
A B 470nF 50 22k VTEST2
04604-0-010
TxD
50
VCM(HF) 2.2k GND2
RxD RECEIVE ENABLE VDD1 100nF
FTEST, 110nF VHF
+1.5V S1 -1.5V RE CL RL VOUT
VCC
S2
04604-0-013
GND1
VDD2 100nF
GND2
RE IN
Figure 6. High Frequency Common-Mode Noise Test Circuit
Figure 11. Receiver Enable/Disable
Rev. 0 | Page 10 of 16
04604-0-008
RTS
ADM2486 SWITCHING CHARACTERISTICS
VDD1 0.5VDD1 0V 0.5VDD1
0.7VDD1 RTS 0.5VDD1 0.5VDD1 0.3VDD1
tALH tBLH
tBHL tAHL
tZL
tLZ
B 1/2VO VO A
A, B
2.3V
VOH +0.5V
tSKEW tPWD = |tPALH - tPAHL|, |tPBLH - tPBHL|
VO 0V -VO 90% POINT
tSKEW
tZH
2.3V
tHZ
VOH -0.5V
VOL VOH
90% POINT
A, B
0V
10% POINT 10% POINT
tR
tF
Figure 12. Driver Propagation Delay, Rise/Fall Timing
04604-0-011
Figure 14. Driver Enable/Disable Timing
0.7VDD1
A, B 0V 0V
RE
0.5VDD1
0.5VDD1 0.3VDD1
tPLH
tPHL VOH
RxD
tZL
1.5V O/P LOW
tLZ
VOH +0.5V VOL
RxD
04604-0-019
1.5V
tSKEW = |tPLH - tPHL|
1.5V
tZH
O/P HIGH RxD 0V 1.5V
tHZ
VOH -0.5V
04604-0-020
VOL
VOH
Figure 13. Receiver Propagation Delay
Figure 15. Receiver Enable/Disable Timing
Rev. 0 | Page 11 of 16
04604-0-021
ADM2486 TYPICAL PERFORMANCE CHARACTERISTICS
1.4 1.2 1.0
1
0.8
(mA)
0.6
2
0.4 0.2
4
0 -40 25 TEMPERATURE (C) 85
04604-0-027
CH1 2.00V CH3 2.00V
CH2 2.00V CH4 2.00V
M20.0ns A CH2 T 6.00000ns
3.12V
Figure 16. Unloaded Supply Current vs. Temperature
50 RECEIVER TPLH 45 RECEIVER TPHL 40
1
Figure 19. Driver/Receiver Propagation Delay, Low to High (RLDiff =54 CL1 = CL2 = 100 pF)
35
TIME (ns)
30 25 20 15 10 5 0 -40 25 TEMPERATURE (C) 85
04604-0-026
3
4
CH1 5.00V CH3 2.00V
CH2 2.00V CH4 2.00V
M20.0ns A CH1 T -444.400ns
2.60V
Figure 17. Driver Propagation Delay vs. Temperature
50 DRIVER TBHL 45 DRIVER TALH
SAFETY-LIMITING CURRENT (mA)
Figure 20. Driver/Receiver Propagation Delay, High to Low (RLDiff = 54 CL1 = CL2 = 100 pF)
350
300
40 35 DRIVER TBLH
TIME (ns)
250 SIDE #2 200
DRIVER TAHL
30 25 20 15 10 5
04604-0-027
150 SIDE #1 100 50 0 0 50 100 150 CASE TEMPERATURE (C) 200
04604-0-018
0 -40 25 TEMPERATURE (C) 85
Figure 18. Receiver Propagation Delay vs. Temperature
Figure 21. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per VDE 0884
Rev. 0 | Page 12 of 16
04604-025
04604-025
ADM2486 CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
In the ADM2486, electrical isolation is implemented on the logic side of the interface. Therefore the part has two main sections: a digital isolation section and a transceiver section (see Figure 9). Driver input and request-to-send signals, applied to the TxD and RTS pins respectively and referenced to logic ground (GND1), are coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (GND2). Similarly, the receiver output, referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RxD pin referenced to logic ground. Table 9. Transmitting
SUPPLY STATUS VDD1 VDD2 On On On On On On On Off Off On Off Off INPUTS RTS H H L X X X TxD H L X X X X OUTPUTS A B H L L H Z Z Z Z Z Z Z Z DE H H L L L L
iCoupler(R) Technology
The digital signals are transmitted across the isolation barrier using iCoupler(R) technology. This technique uses chip-scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. Digital inputs are encoded into waveforms which are capable of exciting the primary transformer winding. At the secondary winding, the induced waveforms are then decoded into the binary value that was originally transmitted.
VDD1 ISOLATION BARRIER VDD2
Table 10. Receiving
SUPPLY STATUS VDD1 VDD2 INPUTS A-B (V)
On On On On On On Off Off
On On On On On Off On Off
>0.2 <-0.2 -0.2RE L or NC L or NC L or NC L or NC H L or NC L or NC L or NC
OUTPUT RxD
H L I H Z H H L
A TxD ENCODE DECODE D B
POWER-UP/POWER-DOWN THRESHOLDS
The power-up/power-down characteristics of the ADM2486 are in accordance with the supply thresholds shown in Table 11. Upon power-up, the ADM2486 output signals (A, B, RxD, and DE) reach their correct state once both supplies have exceeded their thresholds. Upon power-down, the ADM2486 output signals retain their correct state until at least one of the supplies drops below its power-down threshold. When the VDD1 powerdown threshold is crossed, the ADM2486 output signals reach their unpowered states within 4 s. Table 11. Power Up/Power-Down Thresholds
Supply VDD1 VDD1 VDD2 VDD2 Transition Power Up Power Down Power Up Power Down Threshold (V) 2.0 1.0 3.3 2.4
RTS
ENCODE
DECODE
DE
RxD
DECODE
ENCODE
R
GND1
GND2
Figure 22. ADM2486 Digital Isolation and Transceiver Sections
TRUTH TABLES
The truth tables in this section use these abbreviations:
Letter H I L X Z NC Description High level Indeterminate Low level Irrelevant High impedance (off) Disconnected
Rev. 0 | Page 13 of 16
04604-0-022
RE
DIGITAL ISOLATION
TRANSCEIVER
ADM2486
THERMAL SHUTDOWN
The ADM2486 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. This circuitry is designed to disable the driver outputs when a die temperature of 150C is reached. As the device cools, the drivers are reenabled at a temperature of 140C.
100
MAIXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (KGAUSS)
10
0.1
1
RECEIVER FAIL-SAFE INPUTS
The receiver input includes a fail-safe feature that guarantees a logic high RxD output when the A and B inputs are floating or open circuited.
0.01
0.001 1k
10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz)
100M
MAGNETIC FIELD IMMUNITY
The ADM2486 is immune to external magnetic fields. This immunity is set by the condition in which induced voltage in the transformer's receiving coil is sufficiently large to either falsely set or reset the decoder. The analysis that follows defines the conditions under which this may occur. The ADM2486's 3 V operating condition is examined as it represents the most susceptible mode of operation. The pulses at the transformer output are greater than 1.0 V in amplitude. The decoder has sensing thresholds at about 0.5 V, therefore establishing a 0.5 V margin in which induced voltages can be tolerated. The induced voltage induced across the receiving coil is given by
Figure 23. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kGauss induces a voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event occurred during a transmitted pulse (and was of the worst-case polarity) it would reduce the received pulse from > 1.0 V to 0.75 V--still well above the 0.5 V sensing threshold of the decoder. As a convenience to the user, Figure 24 shows the magnetic flux density values in terms of more familiar quantities such as maximum allowable current flow at given distances away from the ADM2486 transformers.
1000
MAIXIMUM ALLOWABLE CURRENT (kA)
-d 2 V = r n ; n = 1,2,...,N dt
where: = magnetic flux density (Gauss) N = number of turns in receiving coil rn = radius of nth turn in receiving coil (cm) Given the geometry of the receiving coil and an imposed requirement that the induced voltage is at most 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated, as shown in Figure 23.
DISTANCE = 1m 100 DISTANCE = 5mm 10
DISTANCE = 100mm 1
0.1
0.01 1k
10k 100k 1M 10M MAGNETIC FIELD FREQUENCY (Hz)
100M
Figure 24. Maximum Allowable Current for Various Current-to-ADM2486 Spacings
Note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility.
Rev. 0 | Page 14 of 16
04604-0-017
04604-0-016
ADM2486 APPLICATIONS INFORMATION
POWER VALID INPUT
To avoid glitches on outputs A and B caused by slow power-up and power-down transients on VDD1 (> 100 s/V), the device features a power valid (PV) digital input. This pin should be driven low until VDD1 exceeds 2.0 V. When VDD1 is greater than 2.0 V, this pin should be driven high. Conversely, on powerdown, PV should be driven low before VDD1 reaches 2.0 V. The power valid input can be driven, for example, by the output of a system reset circuit such as the ADM809Z, which has a threshold voltage of 2.32 V.
VDD1
ISOLATED POWER-SUPPLY CIRCUIT
The ADM2486 requires isolated power capable of 5 V at 100 mA to be supplied between the VDD2 and GND2 pins. If no suitable integrated power supply is available, then a discrete circuit such as the one in Figure 26 can be used. A center tapped transformer provides electrical isolation. The primary winding is excited with a pair of square waveforms that are 180 out of phase with each other. A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. The ADP667 linear voltage regulator provides a regulated power supply to the ADM2486's bus-side circuitry. To create the pair of square waves, a D-type flip-flop with complementary Q/Q outputs is used. The flip-flop can be connected so that output Q follows the clock input signal. If no local clock signal is available, then a simple digital oscillator can be implemented with a hex-inverting Schmitt trigger and resistor and capacitor. In this case, values of 3.9 k and 1 nF generate a 364 kHz square wave. A pair of discrete NMOS transistors, being switched by the Q/Q flip-flop outputs, conduct current through the center tap of the primary transformer winding in an alternating fashion.
VDD1
ADM809Z
RESET
PV
ADM2486
GND1
VDD1
2.32V 2.0V
2.32V 2.0V
RESET
Figure 25. Driving PV with ADM809Z
VCC 100nF 3.9k BS107A
04604-0-023
tPOR
ISOLATION BARRIER SD103C 5V IN OUT 22F 10F
VCC 100nF
PR D
CLR Q VCC BS107A
74HC74A CLK 1nF 74HC14A Q 78253 SD103C
ADP667
SET GND SHDN
VCC VDD1 VDD2
ADM2486
GND1
04604-0-024
GND2
Figure 26. Isolated Power-Supply Circuit
Rev. 0 | Page 15 of 16
ADM2486 OUTLINE DIMENSIONS
10.50 (0.4134) 10.10 (0.3976)
16
9
7.60 (0.2992) 7.40 (0.2913)
1 8
10.65 (0.4193) 10.00 (0.3937)
1.27 (0.0500) BSC 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122)
2.65 (0.1043) 2.35 (0.0925)
0.75 (0.0295) x 45 0.25 (0.0098)
SEATING PLANE
8 0.33 (0.0130) 0 0.20 (0.0079)
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 27. 16-Lead Small Outline Package [SOIC] Wide Body (RW-16) Dimensions shown in millimeters (and inches)
ORDERING GUIDE
Model ADM2486BRW ADM2486BRW-REEL Data Rate (Mbps) 20 20 Temperature Range -40C to +85C -40C to +85C Package Description 16-Lead Wide Body SOIC 16-Lead Wide Body SOIC Quantity 47 1000 Package Option RW-16 RW-16
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04604-0-7/04(0)
Rev. 0 | Page 16 of 16
This datasheet has been download from: www..com Datasheets for electronics components.

▲Up To Search▲

Price & Availability of ADM2486

	To Download ADM2486 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .